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Lattice > ECP3 Versa Development Kit PCI Express Demo
Date: 2013-05-24 11:55Read: 5722







Total : 33 ( 1/4 Pages)
ECP5 FPGA Family
by Lattice - 2014-05-22 11:09 - 13,447 views
The ECP5 FPGA Family breaks the rule that all FPGAs should be the highest density, power hungry, and expensive. With a focus on compact, high volume applications, Lattice optimized the ECP5 architecture for low cost, small form factor and low power consumption. These characteristics make the ECP5 devices ideal for delivering programmable connectivity solutions to complement ASICs and ASSPs. Learn more at: http://www.latticesemi.com/en/Products/FPGAandCPLD/ECP5.aspx
iCE40 FPGA IR Interface: Bsquare Dragonboard Demo
by Lattice - 2013-05-24 11:57 - 7,005 views
Lattice Semiconductor demonstrating iCE40 Ultra Low Density FPGA as an IR Interface on the Bsquare Dragonboard
MachXO2 Speed Seminar - Module 4: Wishbone Bus and Other Demos
by Lattice - 2013-05-24 11:57 - 5,450 views
MachXO2 Speed Seminar - Module 3: Hardened I2C Bus Interface
by Lattice - 2013-05-24 11:57 - 5,698 views
MachXO2 Speed Seminar - Module 2: Hardened SPI Bus Interface
by Lattice - 2013-05-24 11:57 - 5,584 views
MachXO2 Speed Seminar - Module 1: Overview
by Lattice - 2013-05-24 11:57 - 5,274 views
Lattice Semiconductor: A New Era
by Lattice - 2013-05-24 11:57 - 6,069 views
2011 marked the beginning of a new era for Lattice. Our new product families—the XO2 and ECP4—have captured the very essence of Lattice. In both cases, we have delivered a world class mix of high performance and low power, while still providing high value to our customers—something we refer to as affordable innovation.
Diamond FPGA Design Software Overview
by Lattice - 2013-05-24 11:56 - 6,093 views
ECP3 Versa Development Kit PCI Express Demo
by Lattice - 2013-05-24 11:55 - 5,722 views
Lattice HDR-60 Video Camera Development Kit
by Lattice - 2013-05-24 11:55 - 5,606 views
The Lattice HDR-60 Video Camera Development Kit is a production- ready High Definition (HD) video camera development system based on the LatticeECP3™ FPGA family. Pre-loaded with a plug- and-play evaluation Image Signal Processing (ISP) pipeline based on Intellectual Property (IP) cores from Lattice partner Helion GmbH, the kit works right out of the box. The IP is capable of delivering 1080p performance at 60 frames per second with 2D noise reduction and High Dynamic Range (HDR). Watch this 5-minute video to: * Understand the features and capabilities of the HDR-60 development kit * See the exceptional performance of the HDR-60 Video Camera Development Kit * Performing Fast Auto Exposure that quickly adjusts to changing light * Delivering greater than 120dB High Dynamic Range (HDR) * Performing high quality Auto White Balance

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| Total | 2014-05-22 | 2013-05-24 |
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